A typical thin-film transistor may be erased by providing holes to boost channel potential. In a conventional planar structure, the substrate can play the role of providing holes. In contrast, in a 3D structure, such as a 3D NAND flash memory, a thin-film transistor may not contact the substrate directly, and thus it is not easy to obtain holes from the substrate. One method to provide holes to such a thin-film transistor is inducing holes by gate-induced drain leakage (GIDL). However, it is sensitive to local electric field and needs a long time to provide sufficient amount of holes. Besides, GIDL stress may damage the gate oxide and degrades the reliability. Another method is using a p-type source instead of a n-type source. However, when the thin-film transistor using a p-type source is read, a voltage drop is occurred.